On the Path Towards the Green Computer

World-wide, computers and data centres contribute towards some six percent of electrical energy consumption – with a growing tendency. “Here, we can achieve great economies through the development of entirely new storage concepts”, says Professor Dr. Rainer Waser, Director of the Institute of Solid State Research (IFF) at the Forschungszentrum Jülich. Within the Jülich Aachen Research Alliance JARA, the team around Rainer Waser from the Forschungszentrum Jülich and the RWTH Aachen developed a new concept for the next but one generation of computer chips. It is based on so-called memristive elements, which store information as a high (HRS – High Resistive State) or low (LRS – Low Resistive State) resistance value. A memristor’s resistance can be programmed by applying voltage and then remains valid without further energy input until corresponding counter voltage switches to the other value.

“This is a decisive advantage compared to contemporary computers”, says Waser. “For in current parts for the main memory, DRAMs, the data is stored in form of charge on capacitors. This is volatile and requires permanent renewal.” Also, conventional computer architecture consists of main memory and processor, which are in different locations. The data transport between functional areas thus required leads to a high consumption of energy.

Not only can memristive elements store data, they can also replace capacitors as logic elements for the processor. “In principle, it is possible to conduct arithmetic operations with these elements and to store the results directly in these same or neighbouring elements”, explains Eike Linn, PhD student in Waser’s Research Group. As a result, the energyintensive data transport between memory and processor becomes obsolete.

Memristors are constructed like a sandwich, for instance, out of a platinum and a copper layer. Between these is an electrolyte, which is permeable for charged particles. When a positive voltage is applied to the copper layer, copper ions form there. They wander through the electrolyte intermediary layer and are reduced to metallic copper on touching the platinum. This results in metallic copper growing towards the copper electrode in the shape of threads or pointy cones. The cell’s resistance is considerably reduced by this conducting bridge. Once a corresponding negative voltage is applied, the entire process is reversed and the copper ions wander back to their layer of origin. Without voltage, the respective condition remains stable. These storage elements are organised in so-called crossbar arrays. These are grids of crossing conducting paths. The memory cell is located at the cross-sections between upper and lower conducting path. By way of this grid structure, single cells can be addressed in a targeted manner. “However, this does not yet work perfectly in practice”, says Linn. When a cell is switched, the applied voltage can affect also neighbouring cells, in particular, when these are in LRS mode and thus feature a low resistance value. For electricity always goes for the path of least resistance. So far, each cell had a preceding transistor to prevent this happening. Yet this makes chip production more expensive and considerably limits the potential cell, and hence, memory density.

Now, the Jülich and Aachen researchers have developed a new concept. The Clou: They simply connect two memristors with opposing polarisation at their respective copper layer  to form one cell. This results in a switch sequence of one HRS element and one LRS element between conducting paths. That way, a large degree of total resistance is constantly achieved, which is sufficient to prevent leakage currents. These new elements are called complementary resistive switches – CRS.

The two memory states 0 and 1 result from the combination of HRS/LRS or LRS/HRS. By applying a write voltage, they can be switched between 0 and 1. A lower voltage is used for reading and it is registered whether there is a current or not. In the 0 combination HRS/LRS, there is no significant current, since the total resistance is comparatively great. Reading voltage is polarised in such a way, that in this case the HRS and LRS values do not change. Conversely, in the 1 combination LRS/HRS, the HRS value is converted into a LRS value. Then, the element features a low total resistance and current flows. At the same time, the initial value is lost. Reading thus is destructive, the previous condition has to be restored by a corresponding write pulse.

Whereas the concept and switch design was developed by Eike Linn at the RWTH Aachen, his colleagues at the Forschungszentrum Jülich demonstrated the technological feasibility. The new CRS structures can be produced with conventional silicon technology or by way of innovative nanoscale printing methods. As they can be minimised to the scale of below 10 nanometres and can also be stacked high as well as manage without a transistor, the memory density can be increased by the factor ten to one hundred compared to current main memories. “Not only does this save a lot of energy, but it could also delay the end of traditional silicon electronics for a while”, says Waser. And thanks to non-volatile memory, the nuisance of booting the computer could become obsolete at last.